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Asynchronous design offers significant benefits for portable electronics, yet it is risky in the hands of inexperienced designers, and there are few experienced designers. Fortunately, asynchronous systems are extremely well suited to high-level functional descriptions in languages such as VHDL.

Tanner Labs is developing a comprehensive automated asynchronous circuit design flow that takes the engineer from the high-level circuit description, through simulation and verification, to layout design that is ready for fabrication. We are implementing an innovative methodology developed by Dr. A. J. Martin (1990) that has been successfully demonstrated to yield high-speed devices as well as fully static circuits that operate robustly with power supply voltages less than 1 V. Such power supply flexibility permits a wide tradeoff of operating speed versus power consumption in the field.

Our asynchronous design tools will implement new synthesis techniques for datapath-based designs, and they will allow the design engineer to optimize the design with respect to speed, power, and architecture. In the future, we plan to provide limited built-in test support using boundary-scan and full-scan techniques.

Our asynchronous CAD tool development has been supported by the U.S. Air Force and ARPA as part of the SBIR program

 

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